@simten/mcp

Compile and simulate a circuit and return signal traces + steady-state cycle. OBSERVATION ONLY — this shows what the circuit does, NOT whether it is correct; use verify_circuit to establish correctness. Does not touch the browser canvas unless show:true. Canvas policy: do not paint during tight iteration; paint at a verify tier-pass, or for a specific failure worth inspecting (pass show:true with a reason).

Return the circuit-builder API: how to write a `circuit()` module — inputs/outputs, nodes, connect — with worked examples. Call this before writing a circuit.

Return the full catalog of available components from `@simten/core/std`, each with its ports and constructor options (e.g. `Register({ width })`). Call this to discover exact part names and parameters instead of guessing.

Return how to write a `.verify.ts` testbench for `verify_circuit`: the `simulate()` stepper API (set/tick/get/dispose), `verify.exhaustive` vs `verify.check`, `declareOracle`, and worked examples (incl. the Tier-A npm-oracle pattern). Call this before writing a testbench.

Parse and validate circuit source code. Returns structured diagnostics including errors, warnings, and suggestions. Runs the full 4-phase validation pipeline: syntax, semantic, type, and structural checks.

Paint or update the live circuit canvas in the browser — the only tool that draws. This is the ONLY thing that updates the canvas: editing the .circuit.ts file does NOT auto-update the browser, so re-call show_circuit (typically after a verify tier-pass) to repaint. Call with NO source/filePath to list connected browser tabs (discovery). Pass close:true to close the preview and stop the server. Canvas policy: don

Build, flash, and UART-capture a project on a connected ULX3S FPGA. Known projects at the time of writing: cpu (RV32I CPU, requires firmware), snake (HDMI hardware Snake), uart_test (standalone UART). New projects can be added by dropping a descriptor in hardware/ulx3s/projects/ and registering it in projects/index.ts — they become callable here without editing this tool. The CLI will reject unknown names with a clear error listing what is registered. Returns a structured RunResult covering every stage (compile, synth, flash, run, match). Kills any active picocom before flashing.

Query a VCD waveform file (from iverilog cross-validation runs or other simulators) for specific signals over a cycle window. Returns transitions or per-cycle values in a token-efficient shape. Use test_name (e.g.