@intelligentelectron/pcb-lens

Look up nets in a PCB layout by name and inspect their connectivity and routing. Provide a net-name pattern (a regular expression); for each matching net you get the connected component pins (grouped by component), the layers the net uses, a per-layer routing summary (trace widths, number of routed segments, and total routed length), and a via summary (count per drill size). All distances are in microns. Copper that is filled as a pour or plane instead of drawn as a trace is reported as routed on its layer but without a width or length, so a net can be fully routed yet show no trace width. A net that returns pins but no routing was most likely exported without its routed-copper data. Use a specific pattern: one that matches every net in the design is rejected. Set detail='full' to additionally return exact geometry — every via coordinate and the full point-by-point shape of each routed trace (including arcs for curved traces); for very large nets this geometry is sampled and the response is marked truncated.

Look up a single component by its exact reference designator (refdes). Returns its placement (position, rotation, layer), package and BOM details, the nets connected to each pin, and a summary of its pads (count and the distinct pad shapes). The refdes must match exactly; it is not a pattern. Set detail='full' to additionally get the exact coordinate of every pad (sampled for components with very many pads).

Get a high-level overview of a PCB design file: file metadata, the layer stackup, design units, and the total component and net counts. Use this first to understand a design's size and layers before querying specific components or nets.

Export the design rules and constraints from a Cadence Allegro .brd file to a .tcfx file, which you can then read with get_constraints. Windows only, and requires a Cadence SPB installation (detected automatically).

Query layout constraints from a Cadence .tcfx file. Without a section name, returns an overview of all sections and object counts. With a section name, returns all constraint objects with their attributes, references, and members. Common sections: PhysicalCSet, SpacingCSet, ElectricalCSet, NetClass, Design (stackup), Region.

Render a net's routing geometry as SVG from an IPC-2581 file. Returns an SVG showing board outline, trace paths by layer, exact SMD pad shapes, via annular rings, and pin labels.

Export a Cadence Allegro .brd file to an IPC-2581 XML file, the format the other PCB query tools (get_pcb_metadata, get_pcb_component, get_pcb_net) read. Windows only, and requires a Cadence SPB installation (detected automatically).